Michael Parker (7) (1963–)

Michael Parker is responsible for Intel's FPGA division digital signal processing (DSP) product planning. This includes Variable Precision FPGA silicon architecture for DSP applications, DSP tool development, floating point tools, IP and video IP. He joined Altera (now Intel) in January 2007 and show more has over 20 years of previous DSP engineering design experience with companies such as Alvarion, Soma Networks, Avalcora TCSI. Stanford Telecom, and several start-up companies. He holds an MSEE from Santa Clara University and a BSEE from Rensselaer Polytechnic Institute. show less